Current sensing field-effect transistors, which are frequently referred to as sense FETs., have been used for many years in integrated circuit applications where accurate current sensing can provide information for both control and over-current protection. Sense FETs are typically constructed as a small part or transistor section of a larger, main current carrying semiconductor device. For example, in a conventional insulated-gate field-effect transistor (MOSFET) device, the sense FET may comprise a small section of the channel region of the main device. In operation, the sense FET may sample a small fraction of the channel current of the larger device, thereby providing an indication of the current flowing through the main transistor device. The sense FET and main device typically share a common drain and gate, but each has a separate source electrode which may or may not be shorted to the body region.
Sense FETs are particularly useful in many power delivery applications to provide current limit protection and accurate power delivery. However, the accuracy of such type current sensing is relatively poor due to the possible changes in drain to source resistance (RDS) of the power FET. In silicon (Si) MOSFETs the RDS mostly changes as a function of the junction temperature. Current sensing ratio (CSR) variations may be compensated by thermal coupling of a sense resistor to the MOSFET and appropriate matching of the temperature coefficient (TC) of the sense resistor with the TC of the MOSFET. It is appreciated that in gallium nitride (GaN) FET devices the RDS may change not only as a function of temperature but also as a function of applied drain-source voltage VDS (during OFF time). These extra variables make it more difficult to identify and compensate for all the stresses that cause inaccuracies in current sensing.
For accurate current sensing functions the sense transistor generally should maintain a constant CSR with respect to a main power transistor over a wide range of parameters. The drain current may change from a minimum load to the maximum allowable load and to the over current fault protection limit (e.g., 100 mA to 10 amperes). A wide range of temperature change (e.g., −25° C. to 125° C.), as well as fabrication process variations and mechanical stress/packaging variations may cause discrepancies. The ratio of drain current of the main power transistor to that of the sense transistor typically ranges between 20:1 to 800:1, or greater, which makes it very difficult to keep an accurate current ratio with a single current sense transistor for all conditions of low load current measurement up to very high current limit for protection (e.g., in short circuit fault).
Corresponding reference characters indicate corresponding components throughout the several views of the drawings. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of various embodiments of the present invention. Also, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are often not depicted in order to facilitate a less obstructed view of these various embodiments of the present invention.